Busy Box and related

Overview

Block diagram BusyBox

ALICE is one of four large detectors situated at the collision points in the Large Hadron Collider (LHC) at CERN. The BusyBox is used by four of ALICE’s sub-detectors: Time Projection Chamber (TPC), Photon Spectrometer (PHOS), Forward Multiplicity Detector (FMD) and Electromagnetic Calorimeter (EMCal)

Triggers initiate data readout from ALICE’s sub-detectors and are received by the DCS board via an optical cable interface. The triggers and associated data are routed from the TTCrx ASIC on the DCS board to the BusyBox FPGA(s). Here, the L1a and Serial B line raw data is decoded by the Trigger Receiver firmware module.

Every time a trigger sequence starts the Fee starts buffering data, i.e. a buffer in the Fee is used. A valid trigger sequence ends with an L2a trigger and the event data along with the event ID is sent to the D-RORCs.

The purpose of BusyBox is to let the Central Trigger Processor (CTP) know when the Fee’s buffers are full by asserting a busy signal which prevents further issuing of triggers. The BusyBox and D-RORCs receives a unique event ID from the Fee after an event. After a valid trigger sequence ends the BusyBox will ask the D-RORCs if they have received the same event ID as the BusyBox did. If they do not reply with the same ID it means data has not been shipped from the Fee to the D-RORC, hence, the buffer in the Fee still holds event data.

The Fee buffers can hold 4 or 8 events and the BusyBox keeps track of free buffers. The busy is asserted if the buffers are full.

Interaction with the BusyBox is done through the DCS board, either via Ethernet or UART.

The BusyBoxes are located in the DAQ counting rom.

Version history

1.0

• Magne Munkejord

1.01 (~may 2009)

• Firmware version register added to 0x2015
• Busy Controller module updated to handle orphan messages

Download Section

Specification document:
user_guide_busybox.pdf

Source files:
SVN database | CVS database Trigger Receiver

BusyBox firmware:

• Version 1.01:
busybox_fpga1.bit | busybox_fpga2.bit | busybox_fpga1_solo.bit

VHDL source code for Trigger Receiver module:

VHDL code for Trigger Receiver

DCS board firmware for BusyBox:

BUSYBOX

Related documents for BusyBox:
RCU Trigger Receiver Module
Master Thesis, Magne Munkejord
PhD Thesis, Johan Alme