Busy Box and related: Difference between revisions

Revision as of 11:52, 20 May 2009

Overview

Traditionally the Fee in ALICE sub-detectors indicates when its buffers are full and cannot handle further triggers from the CTP. This is either done directly or through the FANIN module to the LTU with a busy signal.

Due to dense cabling, four of the ALICE sub-detectors (TPC, PHOS, FMD and EMCal), utilize a BusyBox to keep track of free buffers in their Fec. The BusyBox asserts the busy signal to the LTU when one or more of these conditions are true:

Buffers in Fec are full
Upon receiving a trigger sequence from TTC
When the TTC sends a global reset to the Fee

The busy signal is de-asserted when one or more FEC buffers are freed

The BusyBoxes are located in the DAQ counting rom.

Version history

1.0

Magne Munkejord

1.01 (~may 2009)

Firmware version register added to 0x2015
Busy Controller module updated to handle orphan messages

Download Section

Specification document:
Media:User_guide_busybox.pdf‎‎ |

Source files: SVN database

Version 1.01:
| busybox_fpga1.bit | | busybox_fpga2.bit | | busybox_fpga1_solo.bit |

RCU Trigger Receiver Module

Master Thesis, Magne Munkejord

PhD Thesis, Johan Alme

User Guide BusyBox, Rikard Bølgen

@@ Line 37: / Line 37: @@
 <ul>
+BusyBox firmware:<br>
 <li>'''Version 1.01: '''<br>
 [http://svn.ift.uib.no/svn/busybox_firmware/trunk/busybox_files/busybox_fpga1.bit | busybox_fpga1.bit] |
@@ Line 42: / Line 43: @@
 [http://svn.ift.uib.no/svn/busybox_firmware/trunk/busybox_files/busybox_fpga1_solo.bit | busybox_fpga1_solo.bit] |
 </li>
+<br>
 [[Electronics_for_the_Time_Projection_Chamber_%28TPC%29#RCU_Trigger_Receiver_Module|RCU Trigger Receiver Module]]