File list
This special page shows all uploaded files.
| Date | Name | Thumbnail | Size | User | Description | Versions |
|---|---|---|---|---|---|---|
| 08:04, 29 September 2022 | Example script.txt (file) |  |
2 KB | Are033 | File uploaded with MsUpload | 1 |
| 09:07, 28 September 2022 | PN ratio 4.png (file) |  |
334 KB | Are033 | 1 | |
| 09:04, 28 September 2022 | PN ratio 1.png (file) |  |
242 KB | Are033 | 1 | |
| 09:05, 14 September 2022 | Invert 1.png (file) |  |
97 KB | Are033 | 1 | |
| 08:47, 13 September 2022 | Libmanager basic.png (file) |  |
47 KB | Are033 | 1 | |
| 08:44, 13 September 2022 | Start virt.png (file) |  |
106 KB | Are033 | 1 | |
| 09:55, 30 June 2021 | Master thesis Wai Chun.pdf (file) |  |
12.96 MB | Nfyst | 1 | |
| 14:07, 7 May 2021 | Corner setup.png (file) |  |
144 KB | Hbi009 | File uploaded with MsUpload | 1 |
| 16:39, 22 February 2021 | XJLink Manager.png (file) |  |
19 KB | Lra034 | 1 | |
| 16:11, 22 February 2021 | XJDemo v3.1.png (file) |  |
209 KB | Lra034 | 1 | |
| 14:15, 11 December 2020 | Nikolai-thesis-final.pdf (file) | |
9.34 MB | Nfyal | 1 | |
| 14:15, 10 November 2020 | Higgs2020.pdf (file) | |
26.34 MB | Nfyal | summary of higgs2020 conference, Valerio Dao | 1 |
| 23:32, 3 November 2020 | Grieg-logo.png (file) |  |
1.1 MB | Nfyal | 1 | |
| 12:22, 3 May 2020 | Puttyx11.png (file) |  |
17 KB | Bhu006 | 1 | |
| 12:22, 3 May 2020 | Puttylogin.png (file) |  |
22 KB | Bhu006 | 1 | |
| 13:29, 29 May 2018 | Hierarket.jpg (file) |  |
638 KB | Gge002 | 1 | |
| 15:28, 4 May 2018 | Hierarchy editor.png (file) |  |
78 KB | Put009 | 1 | |
| 15:00, 4 May 2018 | LVS summary.png (file) |  |
30 KB | Put009 | 1 | |
| 11:43, 4 May 2018 | Extracted layout SRAM with bt wd.png (file) |  |
120 KB | Put009 | 1 | |
| 08:52, 3 May 2018 | ASSURA QRC.png (file) |  |
108 KB | Put009 | 1 | |
| 14:24, 22 March 2018 | Shaper.ps.jpg (file) |  |
22 KB | Fli091 | The output of the Cadence postscript-printer converted to jpg for showing on the wiki | 1 |
| 13:46, 22 March 2018 | CadencePlotOptions.png (file) |  |
44 KB | Fli091 | A screenshot showing the plot options window in Cadence Virtuoso | 1 |
| 13:45, 22 March 2018 | CadencePrintWindow.png (file) |  |
51 KB | Fli091 | A screenshot of the print-window in Cadence Virtuoso | 1 |
| 15:17, 4 January 2018 | Running concurrent xilinx sdk added.png (file) |  |
72 KB | Yag005 | File uploaded with MsUpload | 1 |
| 15:08, 4 January 2018 | Running concurrent xilinx sdk not added.png (file) |  |
140 KB | Yag005 | File uploaded with MsUpload | 1 |
| 17:53, 6 December 2017 | Fsbl created.png (file) |  |
15 KB | Yag005 | File uploaded with MsUpload | 1 |
| 17:49, 6 December 2017 | Project explorer start.png (file) |  |
13 KB | Yag005 | File uploaded with MsUpload | 1 |
| 17:35, 6 December 2017 | Main code.png (file) |  |
53 KB | Yag005 | File uploaded with MsUpload | 1 |
| 17:32, 6 December 2017 | AXILedBlink code.png (file) |  |
26 KB | Yag005 | File uploaded with MsUpload | 1 |
| 17:23, 6 December 2017 | Remove include demo libs.png (file) |  |
45 KB | Yag005 | File uploaded with MsUpload | 1 |
| 17:05, 6 December 2017 | Source folder.png (file) |  |
118 KB | Yag005 | File uploaded with MsUpload | 3 |
| 15:51, 6 December 2017 | FreeRTOSConfig cpu freq edit.png (file) |  |
192 KB | Yag005 | File uploaded with MsUpload | 1 |
| 15:46, 6 December 2017 | Port c edit.png (file) |  |
246 KB | Yag005 | File uploaded with MsUpload | 1 |
| 15:39, 6 December 2017 | Lscript id edit.png (file) |  |
134 KB | Yag005 | File uploaded with MsUpload | 1 |
| 16:52, 4 December 2017 | Led port success.png (file) |  |
24 KB | Yag005 | File uploaded with MsUpload | 2 |
| 16:49, 4 December 2017 | S00 1.png (file) |  |
90 KB | Yag005 | File uploaded with MsUpload | 1 |
| 16:48, 4 December 2017 | S00 2.png (file) |  |
82 KB | Yag005 | File uploaded with MsUpload | 1 |
| 16:48, 4 December 2017 | Led ip 1.png (file) |  |
85 KB | Yag005 | File uploaded with MsUpload | 1 |
| 16:48, 4 December 2017 | Led ip 3.png (file) |  |
75 KB | Yag005 | File uploaded with MsUpload | 1 |
| 16:48, 4 December 2017 | Led ip 2.png (file) |  |
94 KB | Yag005 | File uploaded with MsUpload | 1 |
| 14:24, 4 December 2017 | Diagram axi4lite periph added.png (file) |  |
68 KB | Yag005 | File uploaded with MsUpload | 2 |
| 13:44, 4 December 2017 | Add interfaces axi4lite.png (file) |  |
29 KB | Yag005 | File uploaded with MsUpload | 1 |
| 14:43, 28 November 2017 | First block.png (file) |  |
35 KB | Yag005 | File uploaded with MsUpload | 2 |
| 14:33, 28 November 2017 | Create block design.png (file) |  |
16 KB | Yag005 | File uploaded with MsUpload | 1 |
| 14:25, 28 November 2017 | New project default part.png (file) |  |
41 KB | Yag005 | File uploaded with MsUpload | 1 |
| 14:01, 28 November 2017 | New project name.png (file) |  |
24 KB | Yag005 | File uploaded with MsUpload | 1 |
| 13:46, 28 November 2017 | Export hardware.png (file) |  |
12 KB | Yag005 | File uploaded with MsUpload | 1 |
| 13:42, 28 November 2017 | Launch SDK.png (file) |  |
13 KB | Yag005 | 1 | |
| 08:55, 24 November 2017 | Root file hierarchy.PNG (file) |  |
32 KB | Hpe090 | File uploaded with MsUpload | 1 |
| 08:55, 24 November 2017 | Geometry hiarerachy.png (file) |  |
14 KB | Hpe090 | File uploaded with MsUpload | 1 |
