Cadence Virtuoso overview: Difference between revisions
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Revision as of 12:32, 15 September 2017
Analog IC design flow using Cadence from basics (Schematic capture, Netlist extraction, Simulating using ELDO, Layout, Signoff Layout)
Simulation
Layout
Helpful stuff
Transistor operating point printer - Script to extract transistor operating point parameters after simulation.
ADEXL-butterfly-curves - Howto make DC butterfly curves easily.