ift - User contributions [en]

PHYS321

2018-01-12T10:33:39Z

Mer020:

== Fagressurser for bruk i PHYS321 ==

=== Fagbøker ===
* [http://site.ebrary.com/lib/bergen/docDetail.action?docID=10053265 Essentials of Electronic Testing for Digital, Memory, and Mixed-Signal VLSI Circuits]

=== Nettressurser ===
* [http://klabs.org/richcontent/Tutorial/tutorial.htm Tutorials for Programmable Logic and Military/Aerospace Systems] (broken link)
* [http://www.ecs.umass.edu/ece/koren/arith/simulator/ Arithmetic Algorithms Simulators]
* [http://en.wikipedia.org/wiki/Linear_feedback_shift_register Linear feedback shift register]

==== Cadence tutorials ====
* [http://www-classes.usc.edu/engr/ee-s/477p/cadencetutorial.pdf Inverter eksempel]
* [https://www.youtube.com/watch?v=DPCu822wXPQ Inverter eksempel 1 youtube]
* [https://www.youtube.com/watch?v=AIjGRzNIWC4 Inverter eksempel 2 youtube]
* [https://www.youtube.com/watch?v=mQm88hoskkw Inverter eksempel 3 youtube]

==== Digilent Nexys 4 ====
* [https://reference.digilentinc.com/vivado:installation Install Vivado with free licence]
* [https://reference.digilentinc.com/nexys:nexys4:gsg Getting started]
* [https://reference.digilentinc.com/vivado Vivado - Xilinx Programming Environment - Board files, reference projects, etc]
* [https://reference.digilentinc.com/nexys:nexys4:start Nexys 4 Resource center]

==== Using Vivado ====

* [[Install Vivado 2015.4 with free licens]]
* [[VGA controller VHDL code]]
* [[Nexys4_Master.xdc]]
* [[Using the VGA controller with block ram generator and clock wizard]]

=== Gamle øvingsoppgaver ===
[[Øvingsoppgaver PHYS321]]

[[Category:Mikroelektronikk]]

XJTAG

2016-05-20T09:57:01Z

Mer020: Added link to XJTAG_for_new_prototypes

=XJEase and XJDeveloper Tutorial=

You should run the tutorial at Program Files> XJTAG 2.3 > Help > XJEase and XJDeveloper Tutorial
This tutorial assumes you have a version 2.0 of the XJDemo board. Below are pictures of versions 1.2 and 2.0 of the XJDemo board side-by-side so you can identify which you have. The main identifying feature of version 2.0 is its blue thumbwheel.

[[Image:XJDemo v1.2.png|292px]][[Image:XJDemo v2.0.png|292px]]

=Running the XJDemo version 2.0 demo on the XJDemo version 1.2 card=

We are using version 1.2 XJDemo board (most likely version 1.2). The main functional differences are:
# The RAM circuit is a Holtek HT6116 2Kx8 bit as opposed to the BS62LV256SC on the v2.0 board. Refer to the schematic for the pinmapping for page 11 of the tutorial.
# The ADC is not available on the v1.2 board
# The jumper between the Altera and Xilinx device is not present on the v1.2 board

You can download the modified tutorial files from [http://web.ift.uib.no/~kjetil/wiki/XJTAG%20Demo%20Board.zip here].

The tutorial aims to give you an understanding the process of creating an XJEase test system for a circuit, and the XJEase design philosophy.
The tutorial can be navigated through the "Previous", "Home" and "Next" buttons at the top and bottom of each page in the tutorial.
The structure of the tutorial is as follows:

==Circuit description==
The tutorial begins with a description of the XJDemo board and links to the data sheets for each of the components in the circuit.

==Creating the project file==
You will use XJDeveloper to create an XJEase description of the XJDemo board. This section explains how the various pieces of information are used, and what information can be gained from XJTAG automatically while creating the project file.

==Running the connection test==
We run a connection test and demonstrate various types of error detection using the XJDemo board.

==Simple device testing==
We create simple scripts to test the push buttons and LEDs. This illustrates the simplicity of programming in the XJEase language.

==More complex device testing==
We test the memory device, by creating a script that contains the read and write cycles for the device, along with a simple memory test that uses these functions.

==Design reuse==
Using a standard memory test and some standard IIC interface code, we quickly create some tests for the BS62LV256 static RAM and the EEPROM.
==DFT Analysis==
The demo script is analysed to check the coverage of the test code and find out where extra tests need to be applied to improve the testability of the board.

=Additional resources=
[[XJTAG_for_new_prototypes]]

[[Category:Mikroelektronikk]]

XJTAG for new prototypes

2016-05-20T09:51:33Z

Mer020: Small list, hopefully helpful, made for the purpose of speeding up initial development for boundary scan testing.

To make an automated test setup for a new prototype pcb, a few things are needed.

* Cable from XJlink to fit the prototype board. From 2x10 pin ribbon cable connector to TAP connection on the PCB. Pins 1,2,4 & 20 are reserved for VCC, NC, GND & GND on the XJlink. The rest is configurable.

* Netslist of the prototype circuit, for fast setup of XJDeveloper. This can be omitted, but having a netlist will make things faster and easier.

* BSDL file for the JTAG equipped IC's on the pcb. This is needed to set up the JTAG chain for the XJDeveloper.

* XJTAG also provides a .h file for interfacing drivers with C

links to api:
[http://www.xjtag.com/XJAPI.h XJAPI.h]
[http://www.xjtag.com/jtag-tools/xjapi-jtag-access.php XJAPI docs]

[[Category:Mikroelektronikk]]
[[Category:Programming]]
[[Category:JTAG]]
[[Category:XJTAG]]

Cadence Virtuoso overview

2016-05-06T17:10:55Z

Mer020: /* Helpful stuff */

=Analog IC design flow using Cadence from basics (Schematic capture, Netlist extraction, Simulating using ELDO, Layout, Signoff Layout)=

[[ TSMC 130nm process ]]

[[ IHP 130nm process ]]

[[ AMS 350nm process ]]

= Simulation =

[[Testbench|Virtuoso Testbench]]

= Layout =

[[Layout XL and IHP SG13S]]

=Helpful stuff=

[[ Transistor operating point printer ]] - Script to extract transistor operating point parameters after simulation.

[[ ADEXL-butterfly-curves ]] - Howto make DC butterfly curves easily.

[[Category:Mikroelektronikk]]

ADEXL-butterfly-curves

2016-05-06T17:10:47Z

Mer020:

To create a butterfly curve, for example for characterizing SRAM read and hold margins, simulate a single DC sweep (one source, one sweep) on a input.
Plot both the input (shows up as a straight line for a linear DC sweep) and the output (shows up as the DC response of your circuit).

Have both plots in the same subwindows.

go to Axis -> Y vs Y
choose the first trace, press ok.

go again to Axis -> Y vs Y
choose the second trace, press ok.

Put both results in the same plot, and you are finished.

ADEXL-butterfly-curves

2016-05-06T17:08:50Z

Mer020: Created page with "To create a butterfly curve, for example for characterizing SRAM read and hold margins, simulate a single DC sweep (one source, one sweep) on a input. Plot both the input (sho..."

To create a butterfly curve, for example for characterizing SRAM read and hold margins, simulate a single DC sweep (one source, one sweep) on a input.
Plot both the input (shows up as a straight line for a linear DC sweep) and the output (shows up as the DC response of your circuit).

Have both plots in the same subwindows.

go to Axis -> Y vs Y
choose the first trace

go again to Axis -> Y vs Y
choose the second trace

Put both results in the same plot, and you are finished.